1. Field of the Invention
The present invention relates to a mounting substrate, and more particularly, to a mounting substrate mounted with a multilayer ceramic capacitor including a laminated body including a plurality of dielectric layers laminated and a plurality of internal electrodes; and external electrodes on end surfaces of the laminated body to be electrically connected to the internal electrodes.
2. Description of the Related Art
In electronic circuits that use ICs such as operational amplifiers, direct currents are superimposed at transistors on signals output from the ICs, thereby amplifying the signals, and the amplified signals are transmitted to a next electronic component. However, depending on the electronic component that receives the signals, it may be advantageous to suppress the flow of direct current, and to receive only signals. Therefore, a capacitor is inserted between the ICs and the electronic component that receives the signals, thereby causing the signals to pass with signal attenuation suppressed. This capacitor is referred to as a coupling capacitor. This coupling capacitor is required to be lower in insertion loss in a wider frequency region, in order to keep signals from being attenuated in a wide range of frequencies.
The insertion loss is largely affected by a component of electrostatic capacitance in a low-frequency region, and largely affected by two components of equivalent series inductance and equivalent series resistance in a high-frequency region.
In this regard, there is, as a coupling capacitor the multilayer capacitor described in Japanese Patent Application Laid-Open No. 2004-296940. Japanese Patent Application Laid-Open No. 2004-296940 discloses mounting the multilayer capacitor on a substrate such that internal electrodes of the multilayer capacitor are perpendicular or substantially perpendicular to the planar direction of a mounting surface of the substrate, for further lowering the equivalent series inductance. In this regard, as a method for mounting the multilayer capacitor, a method is typically adopted in which the multilayer capacitor subjected to taping is picked up with a nozzle of a mounting machine and mounted on the substrate. Therefore, there is a need for alignment in advance such that the direction of laminating the internal electrodes has the same direction, in order to make the internal electrodes perpendicular or substantially perpendicular to the planar direction of the mounting surface of the substrate.
However, multilayer ceramic capacitors such as the multilayer capacitor described in Japanese Patent Application Laid-Open No. 2004-296940 have internal electrodes buried therein, and the laminating directions of the internal electrodes are difficult to determine by appearance. Therefore, there is a need to determine the laminating directions of the internal electrodes before taping is applied to the multilayer ceramic capacitors, besides the cost for the determination, it is not possible to keep the equivalent series inductance low when the orientations of the internal electrodes are wrong, and as a result, there is a risk of causing insertion loss characteristics to vary in high-frequency regions in the case of mounting on substrates.